Example embodiments of the inventive concepts relate to a semiconductor memory device and/or a memory system including the same. For example, at least some example embodiments relate to a semiconductor memory device for selectively controlling the operation of a redundant latch and/or a memory system including the same.
When even single one of memory cells in a semiconductor memory device, such as dynamic random access memory (DRAM), has a defect, the whole semiconductor memory device may be classified as a poor product. At this time, discarding all of the memory cells may be inefficient in terms of yield. To avoid such inefficiency and increase the yield, a redundant memory cell may be provided in the semiconductor memory device and the memory cell which fails, i.e., a defective cell may be replaced with the redundant memory cell.
When a read operation is performed on the defective cell, the defective cell may be replaced with a redundant memory cell included in a redundant memory block, so that the defective cell can be repaired. For example, when a normal column line is connected to the defective cell, the whole of the normal column may be replaced with a redundant column line included in the redundant memory block. At this time, the one normal column line can be repaired by being replaced with the one redundant column line.
Generally, when the read operation is performed on data stored in a memory cell, a row decoder may enable a row line (e.g., a word line) containing the memory cell in a memory cell array, and the data may be sensed by a sense amplifier and stored in a latch block. The latch block may store and process a plurality of data to implement a prefetch. The prefetch is an operation of reading or writing a plurality of data at each access to a memory cell, for example, to increase a memory access rate.
When data is transmitted to the latch block, fast speed may be required. Accordingly, normal data and redundant data are stored in a latch and then column repair is implemented through address comparison. However, when the column repair is not used, unnecessary transmission of the redundant data from the redundant memory block may occur at each read operation. Such unnecessary transmission may lead to the occurrence of unnecessary power consumption.